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Computer PC/AT INTRODUCTION the Success of a new technology led to a распространениюперсональных computers that solve the problem, требующиевесьма large calculations. Typical and the most распространеннымпредставителем such powerful "PC" is компьютерРС/production AT IBM. Your computer is designed basing on the results of the processor of INTEL 80286, representing now one of the most powerful sixteen-bit microprocessors, although запоследнее time there were more productive processors, и80286 was removed from production in the leading countries. But should remain attention on the consideration of this processor and built on егооснове systems, because they show most clearly получитьпредставление on a new class of machines - AT series. In this paper some basic data and сравнительныехарактеристики on the example of the early model of the computer - on of individual logical ICS and some BIS, without the use of микросхемсверхвысокой degree of integration and special FPGA and the LGM, on the basis of which are created computers of today. Considered cent-master processor with the lowest clock frequency for the 80286 Chi-beh - 6 MHz.. - 2 - 3y=================================== 33 the FUNCTIONING of MICROCOMPUTERS 33 WITH TYRE ORGANIZATION 3LL==================================- Tyres microcomputer forms a group of transmission lines Signa-fishing with address informationй dataх as well as control signals minerals. In fact, it can be divided into three partsи address busуdata bus and bus control signals. Levels of these signals in a given time определяютсостояние system at that time. On Fig. 1 shows the clock 82284, микропроцессор80286 and bus coupler 82288. In addition there are three bus:the address, data and control signals. Clock generates the clock signal CLK for synchronization of the inner workings of the processor and other mikros-Khem. Signal RESET resets the processor to the initial state of the relay. This state is shown in figure simplistic. Signal-READYтакже formed with the help of синхрогенератора. He intended to lengthening cycles when working with slow peripheral lips, total employment. On the address bus, consisting of 24 lines, микропроцессорвыставляет address of a byte or word to be sent пошине data into the processor. In addition, the IP address bus is the microprocessor to specify addresses периферийныхпортов which the exchange of data. Data bus consists of 16 lines. which can be re-dacha as individual bytes. and double-byte words. When пересыл-ke bytes transfer possible and senior 8 lines, and младшим.Шина data двунаправленна, as the transfer of bytes and words можетпроизводится as the microprocessor, and from it. The control bus is formed signals into those directly from the microprocessor signals from the bus controller,as well as the signals coming to the microprocessor from other микросхеми peripheral adapters. The microprocessor uses the bus coupler for formation of control signals that determine the data transfer on шине.Он exposes three signals-SO, -SI, M/-IO, which определяюттип bus cycle (interrupt confirmation, reading port I/you-water, stop, read memory write memory). On основаниизначений these signals bus controller generates управляющиесигналы, controlling the dynamics of this type of tyres. In order to understand the dynamics of work, let's consider what way is made by the processor reading of the words of RAM PA-RAM...
This occurs within 4 cycles CLK, or 2 состоянийпроцессора (i.e. each processor status lasts 2 тактасинхросигнала CLK). During the first state, denoted as T 4s 0, processor sets the address bus address value,which will be read by the word. In addition, it forms нашине together with bus controller сооответствующие значенияуправляющих signals. These signals and address are handled схемойуправления memory, as a result, since the middle of the second century processor status T 4c 0 (i.e. in the beginning of the fourth stage CLK)data bus appears value content соответствующегослова of RAM. And finally, the CPU reads the importance of the designation of the word with a data bus. This transfer (copy)the meaning of the word from memory to the processor ends. - 3 - therefore, if the frequency of the crystal oscillator, a certain authority CLK frequency, equal to 20 MHz, the maximum пропускнаяспособность data bus is (20/4) million words per second,or 10 In/s. Actual throughput is significantly lower. 3G=================================== 33 ORGANIZATION bus SYSTEM LLXXS, and M 33 COMPUTER PCCAT 3LL==================================- Actuallyе in real the computer has not oneа and a few tires Fig. 22. The main tyres only three, and обозначаютсяони as L - bus, S - bus, X - bus. We wound was treated L-bus. We can introduce the concept of remoteness bus from the CPU as tai, that the more buffers separate bus, the more удаленаот processor. The main bus connecting the computer in a single whole, is the S - bus. It is deduced on 8 special connectors slots. These slots are well visible on the computer's motherboard. Down arrow standing Board peripheral adapters. Line of the address, coming from the microprocessor, form the so called-ваемую L - bus. To send this address on the S - bus имеютсяспециальные buffer registers latch. These registers - catches not only pass the address of the L bus to S - bus, but разъединя rent them if necessary. Such a need arises,for example, when you direct access to memory. In ютомслучае the S - bus expose the controller direct access 8237А so-called page registers. They are connected to the X - bus,which also through the buffer registers connected to the system's bus. Thus, the presence of three buses allows you to set the hell resa on the system bus different circuits. All the chips on the system Board, except the processor and the SOP-роцессора, connected to the X - bus, which has a адреснаячасть (HA - bus), a line of data (XD - to-bus and control signals(XCTRL - bus). Therefore, they are separated from the processor two buffer-mi: between L and S tyres and between the S - and X - tires. In addition to these three buses in a computer M - bus, designed-наченная for the Department of system S - bus from RAM. 3G=========================== 33 REGISTERS PROCESSOR 80286 3LL==========================- The set of registers of the processor 80286 is a строгоерасширение set of registers 80866 which had 14 registers. Впроцессоре 80286 appeared 5 more new registersвbringing their total number increased to 19. Further, we consider the so-called visibleе registersыthe contents of which you can either read or modify прорам-мным way.